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vuplus: dvb wait delay for ci response

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Origin commit data
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Branch: master
Commit: e100bdf89b
Author: BPanther <bpanther_ts@hotmail.com>
Date: 2020-01-17 (Fri, 17 Jan 2020)


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This commit was generated by Migit
This commit is contained in:
BPanther
2020-01-17 20:42:48 +01:00
committed by vanhofen
parent 78d1293633
commit 56ca54bab9
2 changed files with 22 additions and 1 deletions
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17
common/ca_ci.cpp
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@@ -1918,7 +1918,7 @@ void cCA::SetTSClock(u32 Speed, int slot)
* and here too.
* On the other hand: or ci_clock will be set here for all ci slots ????
*/
char buf[64];
char buf[64];
snprintf(buf, 64, "/proc/stb/tsmux/ci%d_tsclk", slot);
FILE *ci = fopen(buf, "wb");
printf("%s -> %s to: %s\n", FILENAME, __func__, Speed > 9 * 1000000 ? "extra_high" : Speed > 6 * 1000000 ? "high" : "normal");
@@ -1934,3 +1934,18 @@ void cCA::SetTSClock(u32 Speed, int slot)
fclose(ci);
}
}
#if BOXMODEL_VUPLUS_ALL
void cCA::SetCIDelay(int Delay)
{
char buf[64];
snprintf(buf, 64, "/proc/stb/tsmux/rmx_delay");
FILE *ci = fopen(buf, "wb");
printf("%s -> %s to: %i\n", FILENAME, __func__, Delay);
if (ci)
{
fprintf(ci, "%i", Delay);
fclose(ci);
}
}
#endif

6
include/ca_ci.h
View File

@@ -328,6 +328,12 @@ public:
/// Sets the frequency (in Hz) of the TS stream input (only valid for CI)
/// sh4 unused
void SetTSClock(u32 Speed, int slot = 0);
#if BOXMODEL_VUPLUS_ALL
/// dvb wait delay for ci response
void SetCIDelay(int Delay);
#endif
/// Start the CA module
/// sh4 unused
bool Start(void);